RSLogix 500: Moving Timer ACC into Another Timer PRE — figure 1

RSLogix 500: Moving Timer ACC into Another Timer PRE

RSLogix 500 timer programming: capture a running timer's ACC and transfer it to another timer's PRE for reversible door simulation with safety beam.

Bidirectional motion emulation in RSLogix 500 often needs a timer that runs for the time already spent traveling in the opposite direction. A garage-door trainer is the classic case: if the photo-eye trips after three seconds of down travel, the reverse up-travel must run for three seconds, not the hard-coded six-second preset. That requirement cannot be met by editing the source timer’s accumulator. The live .ACC word is overwritten by the timer instruction every scan while the rung is true. The durable pattern is to capture .ACC into an integer on a one-shot edge, then write that integer into the destination timer’s .PRE before enabling reverse travel.

RSLogix 500: Moving Timer ACC into Another Timer PRE — figure 1

Read .ACC, stage through N7, write .PRE—never treat the accumulator as a lasting setpoint.

Timer file architecture

Each SLC timer occupies three words: status bits (EN/TT/DN), .PRE, and .ACC. Timebases are 0.01 s, 0.1 s, or 1.0 s. On a 0.01 s base, a preset of 600 equals six seconds. Publication 1747-6.15 documents the instruction set behavior in detail.

Element Role Writable setpoint?
T4:x.PRE Target count Yes — correct destination
T4:x.ACC Elapsed count No lasting effect while EN true
T4:x/TT Timing qualifier Use to gate capture

Why MOV into .ACC fails

While EN is true, the TON/TOF/RTO instruction updates .ACC every scan. A user MOV into .ACC is overwritten on the next (or even same) scan. Reloading .ACC also does not redefine the comparison target; the instruction compares .ACC against .PRE. Writing a new .PRE and restarting from .ACC = 0 is the controlled way to change duration.

Capture with ONS, transfer with MOV

Rung capture:
XIC Door_Going_Down  XIC Down_Timer/TT  ONS Capture_Bit  MOV T4:2.ACC N7:10

Rung load preset:
XIC Capture_Bit  MOV N7:10 T4:3.PRE

Rung latch:
XIC Capture_Bit  OTL Preset_Loaded

Rung default (gated):
XIC Door_Idle  XIO Preset_Loaded  MOV 600 T4:3.PRE

Rung clear:
XIC Up_Timer/DN  OTU Preset_Loaded

RSLogix 500 will not accept a MOV that uses the same timer element as both source and destination. Always stage through an integer file word such as N7:10. The ONS storage bit keeps the capture on the leading edge of the beam so a held input does not rewrite the preset every scan.

RSLogix 500: Moving Timer ACC into Another Timer PRE — figure 2

State machine around the transfer

State Entry condition Action
IDLE Power-up / both done Clear one-shots and direction bits
GOING_UP UP edge Default up preset if not loaded
GOING_DOWN DOWN edge Default down preset
REVERSING Beam edge while down Capture ACC → up PRE, enable up

Studio 5000 migration notes

Logix timers use the same .PRE / .ACC semantics with tag-based addresses. Capture into a DINT, write the reverse timer’s .PRE, and retain one-shot edge detection with ONS or equivalent. Knowledgebase A-43402 discusses moving accumulated values into other tags on ControlLogix; the element roles match the SLC pattern.

ACC capture and PRE write edge checks

Trip the beam at a known elapsed time and confirm the reverse preset equals the captured ACC within one timebase tick. Confirm default presets only load when Preset_Loaded is false. Common mistakes include writing .ACC, omitting the integer stage, capturing without /TT qualification, and allowing an initialization rung to overwrite .PRE after capture. Keep timer documentation consistent with other PLC and PAC standards when migrating the trainer logic to Logix.

About the Author

Mark Townsend | Senior Automation Engineer – Allen-Bradley Systems

Mark Townsend is a senior automation engineer with more than 18 years on Allen-Bradley platforms spanning ControlLogix, CompactLogix, and legacy SLC-500. His day-to-day work is RSLogix / Studio 5000 logic and FactoryTalk View HMI bring-up on aging and mixed fleets.

RSLogix 500: Moving Timer ACC into Another Timer PRE

RSLogix 500 timer programming: capture a running timer's ACC and transfer it to another timer's PRE for reversible door simulation with safety beam.

Bidirectional motion emulation in RSLogix 500 often needs a timer that runs for the time already spent traveling in the opposite direction. A garage-door trainer is the classic case: if the photo-eye trips after three seconds of down travel, the reverse up-travel must run for three seconds, not the hard-coded six-second preset. That requirement cannot be met by editing the source timer’s accumulator. The live .ACC word is overwritten by the timer instruction every scan while the rung is true. The durable pattern is to capture .ACC into an integer on a one-shot edge, then write that integer into the destination timer’s .PRE before enabling reverse travel.

RSLogix 500: Moving Timer ACC into Another Timer PRE — figure 1

Read .ACC, stage through N7, write .PRE—never treat the accumulator as a lasting setpoint.

Timer file architecture

Each SLC timer occupies three words: status bits (EN/TT/DN), .PRE, and .ACC. Timebases are 0.01 s, 0.1 s, or 1.0 s. On a 0.01 s base, a preset of 600 equals six seconds. Publication 1747-6.15 documents the instruction set behavior in detail.

Element Role Writable setpoint?
T4:x.PRE Target count Yes — correct destination
T4:x.ACC Elapsed count No lasting effect while EN true
T4:x/TT Timing qualifier Use to gate capture

Why MOV into .ACC fails

While EN is true, the TON/TOF/RTO instruction updates .ACC every scan. A user MOV into .ACC is overwritten on the next (or even same) scan. Reloading .ACC also does not redefine the comparison target; the instruction compares .ACC against .PRE. Writing a new .PRE and restarting from .ACC = 0 is the controlled way to change duration.

Capture with ONS, transfer with MOV

Rung capture:
XIC Door_Going_Down  XIC Down_Timer/TT  ONS Capture_Bit  MOV T4:2.ACC N7:10

Rung load preset:
XIC Capture_Bit  MOV N7:10 T4:3.PRE

Rung latch:
XIC Capture_Bit  OTL Preset_Loaded

Rung default (gated):
XIC Door_Idle  XIO Preset_Loaded  MOV 600 T4:3.PRE

Rung clear:
XIC Up_Timer/DN  OTU Preset_Loaded

RSLogix 500 will not accept a MOV that uses the same timer element as both source and destination. Always stage through an integer file word such as N7:10. The ONS storage bit keeps the capture on the leading edge of the beam so a held input does not rewrite the preset every scan.

RSLogix 500: Moving Timer ACC into Another Timer PRE — figure 2

State machine around the transfer

State Entry condition Action
IDLE Power-up / both done Clear one-shots and direction bits
GOING_UP UP edge Default up preset if not loaded
GOING_DOWN DOWN edge Default down preset
REVERSING Beam edge while down Capture ACC → up PRE, enable up

Studio 5000 migration notes

Logix timers use the same .PRE / .ACC semantics with tag-based addresses. Capture into a DINT, write the reverse timer’s .PRE, and retain one-shot edge detection with ONS or equivalent. Knowledgebase A-43402 discusses moving accumulated values into other tags on ControlLogix; the element roles match the SLC pattern.

ACC capture and PRE write edge checks

Trip the beam at a known elapsed time and confirm the reverse preset equals the captured ACC within one timebase tick. Confirm default presets only load when Preset_Loaded is false. Common mistakes include writing .ACC, omitting the integer stage, capturing without /TT qualification, and allowing an initialization rung to overwrite .PRE after capture. Keep timer documentation consistent with other PLC and PAC standards when migrating the trainer logic to Logix.

About the Author

Mark Townsend | Senior Automation Engineer – Allen-Bradley Systems

Mark Townsend is a senior automation engineer with more than 18 years on Allen-Bradley platforms spanning ControlLogix, CompactLogix, and legacy SLC-500. His day-to-day work is RSLogix / Studio 5000 logic and FactoryTalk View HMI bring-up on aging and mixed fleets.

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