Tutto sui PLC: la CPU
A practical engineering guide to PLC CPU operation, from deterministic scan cycles and I/O image tables to memory, communications, diagnostics, redundancy, processor sizing, and reliable system...
Managing complex automation sequences in space-restricted panels is the primary role of the Mitsubishi Electric Q2ASCPU-S1, a high-performance compact CPU module designed for the MELSEC QnAS Series control platform. Engineered to deliver rapid instruction execution and extensive memory capacity, this processor handles demanding industrial applications requiring short cycle times and large recipe storage capacity within a compact footprint.
| Parameter | Specification |
|---|---|
| Manufacturer | Mitsubishi Electric |
| Model / SKU | Q2ASCPU-S1 (Q2AS-CPU-S1) |
| Control Method | Stored program repetitive operation |
| Program Capacity | 60k steps |
| I/O Points | 1024 points |
| Basic Instruction Execution Speed | 0.15 microseconds (LD instruction) |
| Internal Current Consumption (5 VDC) | 300 mA (0.3 A) |
| Communication Interfaces | RS-232C (9-pin D-sub), Programming Port |
| Memory Type Support | RAM, ROM, EEPROM (via optional memory cassette) |
| Operating Temperature | 0 to 55 degC |
| Storage Temperature | -20 to 75 degC |
| Country of Origin | Japan |
| Shipping Weight (Calculated) | 0.45 kg |
| Package Dimensions (Calculated) | 150 x 110 x 45 mm |
| RS-232C Pin | Signal Name | Description |
|---|---|---|
| Pin 1 | CD | Carrier Detect |
| Pin 2 | RXD | Receive Data |
| Pin 3 | TXD | Transmit Data |
| Pin 4 | DTR | Data Terminal Ready |
| Pin 5 | SG | Signal Ground |
| Pin 6 | DSR | Data Set Ready |
| Pin 7 | RTS | Request to Send |
| Pin 8 | CTS | Clear to Send |
The Q2ASCPU-S1 acts as a direct, high-capacity upgrade to the standard Q2ASCPU (which is limited to 28k steps). It shares identical physical dimensions and backplane mounting configurations. When migrating from older AnS series CPUs (such as the A1SCPU or A2SCPU), the Q2ASCPU-S1 allows you to retain your existing I/O chassis and modules, though program conversion via GX Developer or GX Works2 is required to map the updated instruction set and register structures.
This CPU utilizes volatile RAM for its primary program execution. To prevent program loss during extended power shutdowns, a functional backup battery (A6BAT) must be maintained. If the "BAT.ERR" LED illuminates on the front panel, the battery must be replaced within 7 days. For critical applications, it is highly recommended to install an optional non-volatile memory cassette (such as the Q2MEM-8MBA) to store a permanent backup of the parameters and logic.
When establishing serial communications via the built-in RS-232C port, ensure that your cable configuration matches the handshaking requirements of your connected device. If using a standard 3-wire connection (TXD, RXD, SG), you must jumper pins 7 (RTS) and 8 (CTS) together on the CPU side to prevent communication timeouts. When configuring GX Developer, select "Q2AS(H)" as the PLC type to enable full instruction compatibility during download.
Risk of electrical shock and equipment damage. Completely de-energize the main power supply to the base unit and all associated external I/O circuits before mounting or removing the CPU module. Failure to do so can cause backplane bus damage or CPU malfunction.
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Returns & Warranty

Managing complex automation sequences in space-restricted panels is the primary role of the Mitsubishi Electric Q2ASCPU-S1, a high-performance compact CPU module designed for the MELSEC QnAS Series control platform. Engineered to deliver rapid instruction execution and extensive memory capacity, this processor handles demanding industrial applications requiring short cycle times and large recipe storage capacity within a compact footprint.
| Parameter | Specification |
|---|---|
| Manufacturer | Mitsubishi Electric |
| Model / SKU | Q2ASCPU-S1 (Q2AS-CPU-S1) |
| Control Method | Stored program repetitive operation |
| Program Capacity | 60k steps |
| I/O Points | 1024 points |
| Basic Instruction Execution Speed | 0.15 microseconds (LD instruction) |
| Internal Current Consumption (5 VDC) | 300 mA (0.3 A) |
| Communication Interfaces | RS-232C (9-pin D-sub), Programming Port |
| Memory Type Support | RAM, ROM, EEPROM (via optional memory cassette) |
| Operating Temperature | 0 to 55 degC |
| Storage Temperature | -20 to 75 degC |
| Country of Origin | Japan |
| Shipping Weight (Calculated) | 0.45 kg |
| Package Dimensions (Calculated) | 150 x 110 x 45 mm |
| RS-232C Pin | Signal Name | Description |
|---|---|---|
| Pin 1 | CD | Carrier Detect |
| Pin 2 | RXD | Receive Data |
| Pin 3 | TXD | Transmit Data |
| Pin 4 | DTR | Data Terminal Ready |
| Pin 5 | SG | Signal Ground |
| Pin 6 | DSR | Data Set Ready |
| Pin 7 | RTS | Request to Send |
| Pin 8 | CTS | Clear to Send |
The Q2ASCPU-S1 acts as a direct, high-capacity upgrade to the standard Q2ASCPU (which is limited to 28k steps). It shares identical physical dimensions and backplane mounting configurations. When migrating from older AnS series CPUs (such as the A1SCPU or A2SCPU), the Q2ASCPU-S1 allows you to retain your existing I/O chassis and modules, though program conversion via GX Developer or GX Works2 is required to map the updated instruction set and register structures.
This CPU utilizes volatile RAM for its primary program execution. To prevent program loss during extended power shutdowns, a functional backup battery (A6BAT) must be maintained. If the "BAT.ERR" LED illuminates on the front panel, the battery must be replaced within 7 days. For critical applications, it is highly recommended to install an optional non-volatile memory cassette (such as the Q2MEM-8MBA) to store a permanent backup of the parameters and logic.
When establishing serial communications via the built-in RS-232C port, ensure that your cable configuration matches the handshaking requirements of your connected device. If using a standard 3-wire connection (TXD, RXD, SG), you must jumper pins 7 (RTS) and 8 (CTS) together on the CPU side to prevent communication timeouts. When configuring GX Developer, select "Q2AS(H)" as the PLC type to enable full instruction compatibility during download.
Risk of electrical shock and equipment damage. Completely de-energize the main power supply to the base unit and all associated external I/O circuits before mounting or removing the CPU module. Failure to do so can cause backplane bus damage or CPU malfunction.
Global Express Shipping
Returns & Warranty
Orders are processed and delivered Monday-Friday (excluding public holidays).
For full eligibility, restocking fees, and international return details, please view our official Refund & Return Policy .
| Country of origin |
United States
|