Tutto sui PLC: la CPU
A practical engineering guide to PLC CPU operation, from deterministic scan cycles and I/O image tables to memory, communications, diagnostics, redundancy, processor sizing, and reliable system...
Executing complex multi-axis synchronization within the MELSEC Q Series automation platform, the Mitsubishi Electric Q173DSCPU acts as a dedicated high-performance motion controller capable of managing high-speed, synchronized machine architectures. This controller operates side-by-side with standard Q Series PLC CPUs on a common base unit, leveraging the high-speed system bus to process sequences and motion paths in parallel. It utilizes the highly reliable SSCNET III/H optical fiber network to coordinate up to 32 axes of motion with microsecond-level precision, minimizing signal noise and latency across distributed servo drives.
| Specification Parameter | Value |
|---|---|
| Manufacturer | Mitsubishi Electric |
| Model Identifier | Q173DSCPU |
| Series | MELSEC Q Series |
| Control Axes Limit | Up to 32 axes |
| Internal Current Consumption (5VDC) | 1.75 A |
| Communication Protocol | SSCNET III/H (150 Mbps, full duplex) |
| Control Method | PTP (Point-to-Point) Control, Interpolation Control, Synchronous Control |
| Programming Software | MT Developer2 (within MELSOFT suite) |
| Physical Dimensions | 120.5 mm x 27.4 mm x 120.3 mm |
| Net Weight | 0.33 kg |
| Shipping Weight | 3.00 kg |
| Country of Origin | Japan |
The Q173DSCPU represents a direct generational upgrade over the older Q173HCPU. When migrating older systems to this CPU, ensure that your existing MR-J3 servo amplifiers are either configured for SSCNET III/H compatibility mode or upgraded to MR-J4 models. Note that the program structure under MT Developer2 differs slightly from the legacy MT Developer format; mechanical system programs must be converted to the newer Motion SFC (Sequential Function Chart) structure to run correctly on this controller hardware.
When utilizing all 32 axes under complex electronic cam or phase compensation structures (SV22), pay close attention to the operation cycle settings in MT Developer2. If the operation cycle is set too low (e.g., 0.222 ms) and CPU processing exceeds 100%, watchdog timer errors or synchronous communication dropouts will occur. For heavy multi-axis coordination, consider balancing processing load by extending the operation cycle to 0.444 ms or 0.888 ms.
SSCNET III/H uses specialized plastic optical fiber (POF) cables. Ensure the minimum bending radius of these optical cables is never compressed below 25 mm. Sharp bends or over-tightened cable zip-ties will cause signal degradation, resulting in intermittent SSCNET loop initialization failure and AL.37 (Parameter Error) or AL.3c (Communication Error) faults on connected MR-J4 servo drives. Keep the protective optical caps on all unused ports to prevent dust contamination.
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Executing complex multi-axis synchronization within the MELSEC Q Series automation platform, the Mitsubishi Electric Q173DSCPU acts as a dedicated high-performance motion controller capable of managing high-speed, synchronized machine architectures. This controller operates side-by-side with standard Q Series PLC CPUs on a common base unit, leveraging the high-speed system bus to process sequences and motion paths in parallel. It utilizes the highly reliable SSCNET III/H optical fiber network to coordinate up to 32 axes of motion with microsecond-level precision, minimizing signal noise and latency across distributed servo drives.
| Specification Parameter | Value |
|---|---|
| Manufacturer | Mitsubishi Electric |
| Model Identifier | Q173DSCPU |
| Series | MELSEC Q Series |
| Control Axes Limit | Up to 32 axes |
| Internal Current Consumption (5VDC) | 1.75 A |
| Communication Protocol | SSCNET III/H (150 Mbps, full duplex) |
| Control Method | PTP (Point-to-Point) Control, Interpolation Control, Synchronous Control |
| Programming Software | MT Developer2 (within MELSOFT suite) |
| Physical Dimensions | 120.5 mm x 27.4 mm x 120.3 mm |
| Net Weight | 0.33 kg |
| Shipping Weight | 3.00 kg |
| Country of Origin | Japan |
The Q173DSCPU represents a direct generational upgrade over the older Q173HCPU. When migrating older systems to this CPU, ensure that your existing MR-J3 servo amplifiers are either configured for SSCNET III/H compatibility mode or upgraded to MR-J4 models. Note that the program structure under MT Developer2 differs slightly from the legacy MT Developer format; mechanical system programs must be converted to the newer Motion SFC (Sequential Function Chart) structure to run correctly on this controller hardware.
When utilizing all 32 axes under complex electronic cam or phase compensation structures (SV22), pay close attention to the operation cycle settings in MT Developer2. If the operation cycle is set too low (e.g., 0.222 ms) and CPU processing exceeds 100%, watchdog timer errors or synchronous communication dropouts will occur. For heavy multi-axis coordination, consider balancing processing load by extending the operation cycle to 0.444 ms or 0.888 ms.
SSCNET III/H uses specialized plastic optical fiber (POF) cables. Ensure the minimum bending radius of these optical cables is never compressed below 25 mm. Sharp bends or over-tightened cable zip-ties will cause signal degradation, resulting in intermittent SSCNET loop initialization failure and AL.37 (Parameter Error) or AL.3c (Communication Error) faults on connected MR-J4 servo drives. Keep the protective optical caps on all unused ports to prevent dust contamination.
Global Express Shipping
Returns & Warranty
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For full eligibility, restocking fees, and international return details, please view our official Refund & Return Policy .
| Country of origin |
United States
|